The present invention relates to a method for manufacturing a semiconductor device, and in particular to a semiconductor device having a complementary MOS transistor
As a semiconductor device, a semiconductor integrated circuit including a so-called complementary MOS transistor in which a n-channel MOS transistor and a p-channel MOS transistor are combined is widely used.
Recently, due to reduction in a gate length of a MOS transistor caused by miniaturization of such a semiconductor integrated circuit, the short channel effect causing a drop in a threshold voltage Vth poses a problem.
Especially in the p-channel MOS transistor, the short channel effect poses a serious problem.
Heretofore, for both the n-channel MOS transistor and the p-channel MOS transistor, an n-type impurity was used as an impurity contained in the gate electrode of poly-crystalline silicon by ion implantation, and the p-channel MOS transistor was made as a buried channel type. Recently, however, it has been attempted to suppress the short channel effect by using a p-type impurity as the impurity contained in the gate electrode of the p-channel MOS transistors to make the p-channel MOS transistors as a MOS transistor of a surface channel type.
However, the following problem was caused when the p-type impurity was used as the impurity contained in the gate electrode and especially when boron (B) was used. The concentration of the impurity in the gate electrode was high so that if the film thickness of a gate oxide film was made thinner, therefore, the impurity was diffused into a semiconductor substrate via the gate oxide film by the thermal load in the manufacturing process. As a result, characteristics of the transistors were changed and so on, resulting in a problem.
As a method for suppressing such diffusion of the impurity, there is a method of diffusing an impurity from an insulating film containing the impurity onto a poly-crystalline silicon film serving as the gate electrode, and thereby attempting to secure the diffusion length of the impurity and optimize the initial distribution.
In this known method, however, an insulating film containing an impurity of an n-type or a p-type was selectively removed, and thereafter ion implantation was conducted, or an insulation film containing the impurity of an opposite polarity was deposited. On a wafer surface at the time when the gate electrode was processed, therefore, there occurred a step between the n-type region and the p-type region. This resulted in many problems, such as nonuniformity in the thickness of a film photoresist film at the time of execution of lithography and pattern deformation caused by reflected light at the time of exposure or the like.